1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof. In this specification, the semiconductor device refers to any device which can function with the use of semiconductor characteristics.
2. Description of the Related Art
In recent years, there has been extensive production of semiconductor devices in which a thin film transistor (a TFT) is formed over a substrate such as a glass substrate which has an insulating surface and used as a switching element or the like. In the thin film transistor, an island-shaped semiconductor layer is formed over a substrate having an insulating surface by a CVD method, a photolithography process, or the like, and part of the island-shaped semiconductor layer is used as a channel formation region of the transistor (for example, see Reference 1: Japanese Published Patent Application No. H08-018055).
An example of a schematic cross-sectional view of a thin film transistor is shown in FIG. 17. As shown in FIG. 17, in the thin film transistor, an insulating layer 31 which serves as a base film is formed over a substrate 30; a semiconductor layer 32 which includes a channel formation region 32a and impurity regions 32b and 32c each of which serves as a source region or a drain region is formed over the insulating layer 31; an insulating layer 33 which serves as a gate insulating layer is formed over the semiconductor layer 32 and the insulating layer 31; a conductive layer 34 which serves as a gate electrode is formed over the insulating layer 33; an insulating layer 203 is formed over the conductive layer 34; and wirings 204 which are electrically connected to the impurity regions 32b and 32c through openings which are formed in the insulating layer 203 and the insulating layer 33 are formed. Note that in FIG. 17 and other drawings in this specification, the semiconductor layer is illustrated to be thicker than in other structures to describe the cross-sectional structure; however, the actual thickness is the value mentioned in this specification.
In the thin film transistor shown in FIG. 17, when the contact hole is formed on the thin semiconductor layer, it has been necessary to form the opening so as not to etch the surface of the source region or the drain region. Therefore, it has been difficult to control the etching.
In addition, in the thin film transistor shown in FIG. 17, the material of the wiring 204 does not adequately cover the side surface of the contact hole which is formed in the insulating layer 203. In some cases, the wiring 204 is not formed particularly around the corner formed by the surface of the semiconductor layer 32 and the insulating layer 33 (around a region 2001); thus, there have been problems in that the wiring 204 is partially thinned or disconnected, and reliability of the element is lowered.
Therefore, a method for forming a contact hole into a tapered shape is proposed so that the material of the wiring 204 can adequately cover the side surface of the contact hole. However, in this method, there are problems in that the upper portion of the contact hole is widened when the contact hole is formed into a tapered shape, and a minute contact hole is difficult to be formed.
Thus, as a method for more easily filling a minute contact hole with a wiring material, a method for forming a contact hole having a step portion in an insulating layer formed over a gate electrode and filling the contact hole with a wiring material is proposed (e.g., reference 2: Japanese Published Patent Application No. H09-135005).